Emulation Staff Engineer
The Silicon Design group is a diverse team of world class silicon engineers. We have 100+ years of cumulative hands-on experience in architecture, logic design, verification, physical design, emulation and firmware. We use the latest silicon technologies and processes to help our clients create well-designed solutions to highly complex challenges. We are designing and developing next-generation, high performance SoCs, supporting our clients in their drive to deliver their product vision to their users. We are involved in all aspects of chip design from definition and architecture through to verification and signoff. Accenture engineers are true “Silicon to SW” Partners, allowing a new breed of companies in the semiconductor ecosystem to innovate in an unparalleled time to market.
An experienced Emulation Engineer
Port ASIC/IP RTL to Emulation platforms
Build model from released RTL .
Generate target platform loadable image(s) test and release the image to Firmware and DV teams.
Run sanity tests for qualifying release of the image(s)
Release the model to various team including Functional Validation team, Firmware, DV
Assist debug of failures providing instrumented model (Waveform Dumps, in circuit debug) and interfacing with stakeholder.
Coordinate with Tools team to validate tool and Model release
Here’s what you need:
A minimum of three years of experience with:
DaugherCards, Speedbridges, Virtual Prototypeing
Emulation Platforms & Tools, methodologies, including in-circuit emulation, hybrid systems or simulation acceleration
A minimum of two years of experience with Hardware Emulators
Bachelor’s Degree or equivalent (12 years) work experience (If an, Associate’s Degree with 6 years of work experience)
Bonus points if:
Programming/scripting skills (C, C++, Python, Tcl or Perl)
Strong knowledge of Complete Design Cycle to understand the Different IP designs to integrate in the build
Simulation acceleration knowledge (DPI and Transactors)
In depth understanding of RTL and Synthesis
Logic simulation: VCS/NCSIM
Experience with CPU integration is a big plus, especially ARM/RISC-V CPU.
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